The project had two phases. The first phase consisted of design and implementation of an encoder for vehicle destruction commands, using the technique of convolutional encoding. The second phase was a detailed study of turbo coding , the recent addition to vast arena of coding techniques.
The system being developed was a uniform combination of hardware, software and coding theory . The basic principle utilizes one of the important coding technique - the convolutional coding. It is implemented in FPGA, which stands for Field Programmable Gate Array. The IC used here is Actel 1280XL, which consists of about 8000 logic gates and memory elements. In order to program the IC , VHDL is used. The VHDL compiler used was Altera Maxplus II.
This system has the capability of generating convolutional codes with more than one rate .Code rates of 2/3 and 2/5 are available which can be selected as desired . This also enables the future development of the system into a turbo code encoder by introducing an interleaver circuit into it.